Marvell posts a net income loss of $448 million in the first quarter due to the storage market.

Source: local   Editor: Alex   Update Time :2019-06-13
Marvell announced financial results for the first quarter fiscal 2020, ended May 4, 2019. Affected by the depressive storage market, Marvell’s revenue for the first quarter of fiscal 2020 was $662 million, an 11.05 percent decrease for the fourth quarter of fiscal 2019 and a 9.56 percent increase for the first quarter of fiscal 2019. Despite several challenges under the market environment, Marvell...

Huawei hosted the first flash forum in China, announcing framework of application-aware storage.

Source: local   Editor: Alex   Update Time :2019-06-12
Huawei proposed an open application-aware storage framework, called the Framework of Application-aware Storage (FAS), in order to removing the bottlenecks of enterprise-grade SSD application performance, improving customers' service experience with storage applications, and reducing infrastructure costs. In addition, Huawei also proposed a new standard for future SSDs.

A letter from Hisilicon president to his employees: Hisilicon is ready for “spare tires”.

Source:   Editor: Alex   Update Time :2019-06-11
Huawei Hisilicon President, He Tingbo, sent a letter to employees on the morning of May 17, in which he said that Hisilicon had made the ultimate survival hypothesis that even one day all the advanced chips and technologies in the United States would not be available, Huawei have developed many "spare tires" to avoid getting into trouble.

Why do many SSDs equipped with M.2 interfaces have quite different speed?

Source: local   Editor: Alex   Update Time :2019-06-09
You need to know the transmission speed of solid state drive is mainly related to flash memory, master control, interface type, supported channels and protocols. Even if both the M.2 interface and the motherboard support same channel, its speed performance may be inferior to others. When you plan to choose SSD with M.2 interface, you must see which channel, protocol and stacking mode SSD is suppor...

Chinese UNIC SSD with 1500 P/E erasing times may be launched

Source: local   Editor: Alex   Update Time :2019-06-08
UNIS SSD is said to be launched recently, which uses their 64-layer 3D TLC flash memory with 1500 P/E. This technology and its specification account for a certain part in mainstream SSD.

Breaking through technical barrier again with 9-nanometer lithography machine promotes upgrade of Chinese industry

Source: local   Editor: Alex   Update Time :2019-06-07
As current lithography machine focuses on 14nm level, the 9nm lithography technology helps breaking down Western high-tech barriers for China, which promotes the upgrade of industry.

SK Hynix invests hundreds of billions of dollars in constructing memory chip factory to keep ahead of China

Source: local   Editor: Alex   Update Time :2019-06-03
SK Hynix has announced investing $107 billion in building four fabs on the Thursday. There will be two memory fabs built in the area of 4.5 million square meters in the south of Seoul since 2022, which are next to two existing fabs with about $49 billion investment in next 10 years.

Intel and Micron have developed new 3D QLC Nand technology while single chip density reaching 1TB

Source: local   Editor: Alex   Update Time :2019-06-02
Intel cooperates with Micron to produce the first 3D QLC (4 bits/Cell) NAND technology in 64-layer architecture and new 4 bits/Cell 3D NAND technology. Thus, 1TB density chip tends to replace mechanical hard disk.

Price reduction of NAND Flash leads to depressive market of SSD

Source: local   Editor: Alex   Update Time :2019-05-31
Although Gounbot’s first quarter earnings of $1.31 billion was declining year on year, Chen Guangzhong, chief executive of Gounbot Group, still is optimistic about the revenue and gross margin of the second quarter this year, as some businesses were disposed last year and NAND Flash inventory is digested gradually.

ISSCC: Toshiba Memory uses PAM 4 to develop bridge chips, increasing SSD speed and capacity

Source: local   Editor: Alex   Update Time :2019-05-30
Compared with traditional bridge-free chip, the bridge chip developed by Toshiba Memory can connect more flash chips and fewer high-speed signal lines, resulting in smaller area and lower power consumption These three new technologies include ring-shaped configuration to reducing transceiver, serial communication using PAM4 to decrees operation speed and cascaded CDR to reduce power consumption an...