Understanding the master control and looking at the solid state drive(SSD): Initial understanding of the master control of the solid State drive
To understand a solid state drive(SSD), it is necessary to start with the master control, which has no less impact on SSD than flash memory.
Under the background of SSD hitting the mechanical hard disk market at a low price, the structure of SSD is also changing. In addition to the power outage protection circuit which originally appeared only in the enterprise model, the independent ROM chip of the SPI interface and the external DRAM cache have also been eliminated because of the cost.
However, no matter when it develops, the master control is an indispensable part of SSD, and with the continuous development of flash memory technology and SSDs market, the status of the master control will be improved step by step. Why is this happening? How important is master control to SSDs? What aspects of SSDs are affected? First of all, let's understand the status, function and mode of operation of the master control.
The status of the master control:
As the name implies, the master control is the main controller of SSD, the brain of a hard disk, equivalent to the CPU in the mobile phone. Every hard drive has its master, even a mechanical hard drive. But the performance of the mechanical hard disk has been basically finalized, and there are only three major manufacturers left in the world: Seagate, Western Digital and Toshiba. And the focus on master control is far less than the rich SSD products.
What do you think is the first thing that we should focus on when we buy a mobile phone? Do you choose Apple or Android? Once you've identified the camp, it's time to determine the grade of the product you want. At this time, CPU is the main point of reference. For example, if you want a mobile phone with the strongest flagship performance, you can learn about the modles with Snapdragon 855. And if you are looking for a phone with a medium cost performance ratio, models with Snapdragon 660 and Snapdragon 710 can be taken into account. Through CPU, the direction of candidates can be roughly determined, and then the price and system software can be compared horizontally.
Well, when it comes to the purchase of SSDs, the master control is also the focus of everyone's most attention, because a master control can convey a performance impression. There are actually two camps for the master control of SSDs: the original factory and the others. At present, the main flash memory manufacturers: Samsung, Toshiba, Micron, Hynix, coupled with Intel, which has just separated from Micron, all produce the original SSD products at the same time.
They are both athletes and referees, and naturally take a big advantage in the competition. However, at present, many original SSD no longer use fully self-developed master chips, such as Intel 545s and 660p/760p, Micron BX500 and MX500, all of which use the master control of TaiWan Huirong. Another example is Toshiba's TR200, which nominally uses Toshiba's own TC58NC1010GSB. In fact, if you look closely, it's based on the PS3111 of Phison.
SSD from the original flash memory factory uses the public-version master control provided by a third party, which is not to say that the master control is not important. On the contrary, with the iteration of flash memory technology, the improvement of SSD’s performance, and, of course, the increase in cost pressure, it is quite difficult to make a good master control and the firmware that matches it. (I want the horse to run but not to eat grass.)
Intel has some high-end models that use simplified enterprise-level master control directly, which reduces repetitive R & D costs, but the manufacturing costs of high-specification master control is not low. Moreover, there are already great differences in the direction of performance tuning between domestic SSDs and enterprise-level SSDs. Enterprise-level SSDs pursue performance consistency, while domestic SSDs require higher short-term explosive power because of unbalanced reading and writing loads. So the enterprise-level design direction is not suitable for the hardware base and usage mode of domestic SSDs in many cases.
Now, besides Samsung, the major flash memory factories, to a certain extent, have delegated the main control design and firmware research and development to the specialized main control suppliers, which complete the design of the related main control and firmware with the technical support of the original factories. Ultimately, the original SSD products will be differentiated from the official products by customizing the firmware.
In addition to the original main control, there are other common SSD master control: Marvell, Phison, Huirong, Realtek, Maxiotek. And VIA also has the news of developing SSD master control.
There are memory core, national science micro and so on in the domestic master control. Through the model of the master control, we can roughly determine the product orientation of SSD using it.
The function and implementation of master Control:
We've listed some of the common master controls, and now we return to the topic of the function of the master control. Why is the master control so important in a SSD? As the "brain" of a SSD, on the one hand, it has to "be able to calculate", and it has to "control both sides" and "deal with things without panic". Does it sound like an ancient counselor?.
First of all, it has to" be able to calculate", which is the most basic functional requirements for the main control. The master control must first have a CPU, but it is not only as simple as having a CPU.
There are many places where the computing power of master control is needed, such as the structure management of FTL flash mapping table, the planning of flash wear balance and the control of the pace of first reading, then writing, and then erasing during garbage collection. Some highly positioned masters usually have multiple CPU cores to perform different tasks, and there is a need for a collaborative mechanism between multiple cores. Nowadays, many master controllers use ARM processor architecture, and usually choose Cortex-R series.
This architecture is different from the A series that we usually see on mobile phones. The R series is used for real-time data processing and is more advantageous in response speed. It is often used in automotive autopilot systems, and of course, our master control of hard drive also uses it.
Secondly, let's talk about its ability to control both sides. Master control is not only the brain of SSD, but also the bridge between the host computer and flash particles. On the one hand, it is necessary to communicate and cooperate with the host, accept and process commands from the host. On the other hand, it is also necessary to deal with the dull and unintelligent flash particles, and do a good job in the specific realization of the underlying data access. For the communication with the host side, the main difficulty lies in the grasp of energy-saving characteristics. Energy-saving SATA link can reduce power consumption, improve the laptop battery life, and also conform to the concept of green environmental protection. However, the SATA link requires the cooperation of both the host and SSD in the process of entering and leaving the energy-saving state, and a little carelessness can lead to not fluent even the bad situation of plate dropping. Nowadays, in order to reduce troubles, many non-original master control systems have directly disabled the energy-saving features, which is also a sign of less self-confidence.
It is also complex for the master control to communicate with flash memory. Flash memory in SSDs is usually called RAW flash memory, which is poorly intelligent and can only follow a specific flash interface for access, such as Toggle or ONFI. However, different flash memory chips have different working characteristics, which requires the master control to actively adapt to the characteristics of flash memory.
In order to write a data to the flash memory chip alone, it is necessary to complete the emission of the control and transmission instructions by applying a variety of high and low potentials to the different pins of the flash memory chip. If you study this process carefully, it is absolutely a brain-consuming job. So don't underestimate the engineers who can develop master control or firmware for master control and they are definitely highly high-IQ people. There are still many functions to be accomplished by the master control, such as temperature management, SMART health report, bad block management and so on, which is not easy.
Finally, "handling things without panic" is the requirement to the master control error correction engine and power-off protection function. We often see SSD label "supporting LDPC error correction". And it actually includes two parts: hard decision and soft decision. The former has hardware acceleration in the master control hardware, while the latter needs to combine the operation ability of the master control to enhance the effect of error correction.
Contrary to the imagination of many friends, flash particles do not only go wrong at the end of their lives, but have a higher error rate at the end of the life span. Therefore, the master control error correction engine is always in operation. And every write and read data must be checked and processed by it.
Power-off protection must be considered in every master control of SSD. In the past, we talked about whether a solid-state hard disk has power-off protection, which refers to whether SSD has a separate power-off protection circuit, including energy storage capacitance, monitoring circuit and the protection action execution logic in firmware. Full power-off protection should include user data protection at runtime and metadata protection in DRAM cache.
Because of the cost and location factors, the consumer-grade SSD can only prevent the disk from plate dropping in response to accidental power outages. Like a row of small capacitors on Micron MX300, the capacity is relatively limited and can only protect the security of FTL flash mapping table. So if it can protect SSD from plate dropping, it will accomplish its mission.
There are more SSDs that don't even have a row of small capacitors, and it doesn't mean that their power-off protection don't exist, but it is only passive to execute. For example, the FTL mapping table is backed up many times in flash memory, so that once damaged, there can be a guarantee that it will not be completely dropped. Another example is to refresh FTL mapping tables to flash memory at regular intervals to reduce the impact of power outages.
The master control of other forms：
In addition to SSDs, there are similar flash master controls in other places, such as eMMC and UFS flash memory, which are chips integrated with the master control functions and can realize the management of flash memory and the sorting, decoding, execution and feedback of read and write instructions.
EMMC and UFS are mostly used in mobile phones and tablets, because the computing power of these devices is not strong enough and memory chips are required to complete many functions such as flash management by themselves.
The main function of hard disk is to store data. Flash memory plays the role of memory in SSD, while the master control is the direct controller of flash memory, which is in the position of mind.
SSD is developing in the direction of larger and faster. Larger capacity needs newer flash memory technology, such as stacking layer growth, TLC conversion to QLC type, which will put forward new requirements for the error correction ability of the master control. Faster speed also requires that the master control can give full play to the characteristics of low delay under the NVMe protocol, at the same time, with the help of the optimized SLC cache algorithm to maximize the burst reading and writing ability.
There are also some differences between different SSDs using the same master control, which is the influence of firmware. But in any case, the master control provides a stage for the firmware to play a role. Without a good foundation of master control, it will be much difficult for the firmware to play its full role.