Samsung: 3nm process is one year ahead of TSMC in GAA and three years ahead of Intel

Source:   Editor: admin Update Time :2019-08-06

Despite the ongoing trade conflict between Japan and South Korea, Samsung electronics' Wafer OEM BBS in Tokyo will be scheduled to go ahead in September. At that time, Samsung is expected to display its advanced manufacturing technology and provide process kit, called GAA, used to produce chips under 3 nanometers. Samsung is said to be one year ahead of global fountain-foundry TSMC in GAA technology and two to three years ahead of Intel.

Samsung announced on 28th that the 2019 BBS (SFF) will be held in Tokyo on September 4 as scheduled and has started accepting applications on its website on September 26, BusinessKorea reported. Samsung's decision defused industry doubts about whether the BBS event would be held in Tokyo at a time of rising trade tensions between Japan and South Korea.

Industry experts said what Samsung express was that the company's fab operations would not be interrupted despite the threat of supply shortage.

The report pointed out that Samsung would showcase its own nanometer process technology and offer a process kit called GAA, which will be used in 3 nanometers process and even more sophisticated manufacturing processes.

Japanese authorities tightened controls on the export of three key semiconductor materials on 4th, of which Japanese photoresist is a key material for ultra-violet (EUV) photolithography, putting Samsung’s wafer foundry be the first to be affected and undermining its ability to compete with TSMC in 7-nanometer chips.

The EUV process is the key to Samsung’s position as the global leader in memory, fab and wafer foundry by 2030. Samsung electronics, which is comparable to TSMC in EUV manufacturing, is ramping up production of 7-nanometer chips in hopes of overtaking TSMC ahead of schedule. But Japan is likely to kick South Korea out of the "white list" this week, so Samsung's imports of high-tech raw materials are expected to be limited.

Samsung is scheduled to complete its first EUV chip production line in Hwaseong in the next few months and plans to build another EUV production line in Pyeongtaek, Gyeonggi. Now, a senior Samsung executive says, "Given the current situation, we must consider the timing of the investment in the new EUV production line."

Samsung Electronics has been holding wafer foundry forums in the U.S., Shanghai and Seoul since May, with the next forum to be held in Munich, Germany, in October.


TSMC Response: Confident to maintain the lead

In the face of Samsung's ambition in actively advancing wafer foundry and attempting to overtake TSMC in the 3nm process, TSMC said it would not comment on the technological development of competitors and stressed the confidence to maintain a global leading position in 7nm, 5nm, and even 3nm process.

According to the supply chain analysis of TSMC, TSMC is thoughtful in the process promotion and has a strong customer base as the backing, so that each advanced process launched by TSMC absolutely meets customers' demand for cost performance and does not compete with customers, which is the biggest niche of leading companies.

At present, 7nm transistors density of TSMC is far ahead of Samsung. Then, TSMC introduced a more advanced 5-nanometer manufacturing process. Samsung is eager to introduce the GAA design architecture into 3nm process to grab TSMC’s existing clients. However, it is extremely expensive to enter the 5nm process, let alone the 3 nanometer manufacturing process.

Samsung, which has long been a leader in memory, wants to replicate model of success in memory to challenge TSMC in wafer foundry.


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